TPA3255DDVR is a high-performance Class D power amplifier delivering top-tier sound quality along with high Class D efficiency. It adopts an advanced integrated feedback structure and TI PurePath™ Ultra-HD high-speed gate drive error correction technology. Supporting AD mode operation, it delivers up to 2×315W power into 4Ω loads at 10% THD, and achieves 2×150W clipping-free output for 8Ω loads.
It features 2VRMS analog input for seamless pairing with high-performance DACs. Built-in low on-resistance MOSFETs of 85mΩ and optimized gate drive design help cut power consumption and standby loss greatly, with no-load power consumption lower than 2.5W.
| Parameter | Specification |
| Model | TPA3255DDVR |
| Device Type | Class-D |
| Amplifier Configuration | Stereo (2-Channel) |
| Output Power (4Ω, 10% THD) | 2 × 315 W |
| Output Power (8Ω, Unclipped) | 2 × 150 W |
| Max Output Power x Channels @ Load | 315W x 2 @ 4Ohm, 600W x 1 @ 2Ohm |
| Operating Mode | AD Mode |
| Analog Input Interface | 2 VRMS |
| MOSFET RDS(on) | 85 mΩ |
| Idle Power Loss | < 2.5 W |
| Supply Voltage Range | 18 V – 53.5 V |
| Load Support | 4Ω / 8Ω |
| Package | 44-HTSSOP |
| Operating Temperature Range | 0°C ~ 70°C (TA) |
| Base Product Number | TPA3255 |
VDD: Internal 12V analog logic and gate-drive regulator supply.
DVDD: Internal 3.3V digital regulator output, used for decoupling and hardware configuration logic.
AVDD: Internal 7.8V analog supply output for internal analog circuitry decoupling.
PVDD_AB / PVDD_CD: High-voltage power supply inputs (18V to 53.5V) for the Channel A/B and Channel C/D output power stages.
GND / Thermal Pad: Ground reference for both internal low-power control circuitry and high-power output stages.
GVDD_AB / GVDD_CD: Gate-drive voltage supply outputs used for local decoupling of the high-side and low-side gate drivers.
M1 / M2: Mode selection hardware inputs configured to set the amplifier into 4xSE, 2xBTL, 2.1, or 1xPBTL output configurations.
INPUT_A / INPUT_B / INPUT_C / INPUT_D: Differential analog audio input pins for Channels A, B, C, and D.
OC_ADJ: Overcurrent adjustment pin that configures the overcurrent protection threshold via an external resistor to GND.
FREQ_ADJ: Master/slave clock config and switching frequency trim pin adjusted via an external resistor or pulled to DVDD.
OSC_IOM / OSC_IOP: Master/slave oscillator clock differential interface pins used to synchronize multiple TPA32xx amplifiers.
RESET: Active-low hardware reset input used to clear fault latches and initiate startup.
FAULT: Active-low, open-drain output that pulls low to report serious system faults like short circuits, overtemperature shutdowns, or undervoltage.
VBG: Bandgap reference voltage output used strictly for internal analog cell biasing and external decoupling.
CLIP_OTW: Active-low, open-drain warning output that flags system clipping or an approaching overtemperature error.
BST_A / BST_B / BST_C / BST_D: Bootstrap capacitor connection pins that supply the high-side gate drive voltages for each channel.
OUT_A / OUT_B / OUT_C / OUT_D: High-power Class-D PWM audio output pins connected directly to the output LC filters.
This simplified system block diagram illustrates a typical Class-D audio amplifier architecture based on TPA3255D2. The audio source and control unit output left and right differential analog signals, which are coupled via input capacitors and fed into the chip. Protection functions and status monitoring are realized through RESET, FAULT, CLIP/OTW signals, while M1/M2, FREQ_ADJ and OSC_IO pins support mode selection, frequency tuning and master-slave synchronization control.
It adopts a dual power supply design. AC input is converted into approximately 51V power supply PVDD and 12V driver supply VDD. The high-frequency PWM output passes through LC low-pass filters to restore analog audio signals and drive speakers.
| Features | Description |
| Differential Inputs | Fully differential analog input for low noise and high fidelity |
| High Power Output (4Ω, 10% THD+N) | Up to 315W stereo in BTL mode |
| High Power Output (8Ω, 10% THD+N) | Up to 185W stereo in BTL mode |
| Mono Output (2Ω, PBTL) | Up to 600W high-power mono output |
| Low Distortion Performance | Ultra-low THD+N with PurePath™ Ultra-HD feedback |
| High Audio Bandwidth | Supports up to 100 kHz signal bandwidth |
| High SNR | >111 dB A-weighted signal-to-noise ratio |
| Low Noise | <85 µV output noise for clean audio |
| Flexible Configurations | Supports stereo, mono, 2.1, and multi-channel modes |
| High Efficiency | Up to 90% Class-D efficiency |
| Wide Supply Range | 18V to 53.5V operation |
| Built-in Protection | Overtemp, undervoltage, short-circuit, clipping protection |
| EMI Compliant | Optimized for low EMI system design |
TPA3255DDVR Applications
| Application | Examples | Benefits |
| Blu-Ray / DVD Receivers | Home theater disc players | High-fidelity audio with efficient power amplification |
| High-End HTiB Systems | Home-Theater-in-a-Box setups | Compact design with high output power and clear sound |
| AV Receivers | Multi-channel home AV systems | Supports immersive audio with low distortion |
| High-End Soundbars | Premium TV soundbars | High power density with excellent sound clarity |
| Mini Combo Systems | Compact stereo music systems | Space-saving design with strong audio performance |
| Active Speakers & Subwoofers | Powered speaker systems, subwoofers | Integrated high-power drive for deep bass and dynamic output |
TPA3255DDVR Typical Application Circuit
TPA3255 can be configured either in stereo BTL mode, 4 channel SE mode, mono PBTL mode, or in 2.1 mixed 1x BTL + 2x SE mode, depending on output power conditions and system design.
1. Stereo BTL Application
Typical Differential (2N) BTL Application
2. Single Ended (1N) SE
3. Differential (2N) PBTL
Typical Differential (2N) PBTL Application
When using the TPA3255DDVR, the first step is to correctly configure its power supply and control pins. This device supports a wide voltage operating range. PVDD requires an 18V–53.5V main power supply (typically around 51V recommended), while VDD uses a 12V logic/driver supply. Low-ESR decoupling capacitors should be placed close to the pins to ensure stable operation.
For mode configuration, different logic levels applied to the M1 and M2 pins allow selection between 2-channel BTL mode or 1-channel PBTL mode, enabling either stereo output or high-power mono subwoofer applications.
In the peripheral circuit design, the audio input should use a differential signal with AC coupling capacitors. The output stage must include an LC low-pass filter network to remove the high-frequency PWM carrier of the Class-D amplifier, restoring a clean analog audio signal for the speakers.
In addition, the RESET pin is typically connected to an MCU GPIO for system control, while the FAULT and CLIP_OTW pins should be pulled up and connected to the MCU for real-time monitoring of overcurrent, overtemperature, and clipping conditions.
The TPA3255 is available in a thermally enhanced TSSOP package. The package type contains a PowerPAD™ that is located on the top side of the device for convenient thermal coupling to the heat sink.
It is a high-performance Class-D audio power amplifier designed for high-efficiency and low-distortion audio applications.
It uses PurePath™ Ultra-HD technology with advanced feedback and gate driver error correction for ultra-low distortion and high SNR.
It includes over-temperature, under-voltage, short-circuit, and clipping protection with fault reporting.
TPA3255DDVR and other electronic parts are available from Heisener Electronics, a global distributor offering large in-stock inventory and fast delivery for OEMs, EMS providers, and electronics design companies.
